The ATmega 2560p features a 10-bit Analog to digital converter.The ADC being connected to 8/16-channel Analog mltiplexer allow 8/16 single ended voltage inputs.
The device also supports 16/32 differential voltage input combinations.Four of which are equipped with programmable gain stage, providing amplification steps of 0 dB, 20 dB, 46 dB on the differential input voltage before the ADC conversion.The 16 channels are split into two sections of 8 in each of which 7 differential analog input channel share a common negative terminal, while any other ADC input in that section can be selected as the positive input terminal.
The ADC contains a sample and hold circuit which ensures that the input volatge to the ADC is held at a constant level during conversion, it also has a seperate analog supply pin, AVCC.Internal Reference voltages of nominally 1.1V, 2.56V or AVCC are provided On-chip.
Note that the Power Reduction ADC bit, PRADC, must be disabled to enable ADC.
- Structure to control the implementation of Integrated Analog Circuit which contain ACSR (Analog Comparator Control and Status Register)
- Structure to control data transfer from Analog to Digital signal conversions.
- Structure to control the timer of type 8 for Analog Write.
- Structure to control the timer of type 16 for Analog Write.
This creates a memory mapped IO for timer 8 type which will assist in analog write.
This creates a memory mapped IO for timer 16 type which will assist in analog write.
New pointer object created for Analog Comparator Structure.
The ADC converts the voltage on the analog input to 10 bit digital value by approximation, where minimum value is GND and maximum is voltage on AREF pin minus 1 LSB. The internal reference voltage may be connected by writing to the REFSn bits in ADMUX Register.
The analog input channel is selected by writing to the MUX bits in ADMUX and ADCSRB. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can be selected as single ended inputs to the ADC.The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and ADCL.
New pointer object created for Analog Structure.
Before enabling ADC, set the PRADC(Power Reduction ADC bit) to zero in prr0 register to disable it.
Then to enable the Analog to digital converter, write one to the ADEN bit in the ADCSRA register.
Also we need to make sure that auto triggering for the ADC is off, and setup the prescaler by choosing the division factor between the XTAL frequency and ADC frequency. This is done by setting bits in ADCSRA register'S ADPS0,ADPS1,ADPS2.
When Bit 5 – ADATE: ADC Auto Trigger Enable is written to one, Auto Triggering of the ADC is enabled. The ADC will start a conversion on a positive edge of the selected trigger signal. The trigger source is selected by setting the ADC Trigger Select bits, ADTS in ADCSRB.
Then we can start the conversion by writing one to the aden bit in ADCSRA register. Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the ADC off while a conversion is in progress, will terminate this conversion.
The Function to analog
read is inside
AnalogPin impl, it gives u32 as return value with 10
of its bits as the result of conversion, all the upper functions are inside this read
function and will automatically setup and convert the analog to digital.
We also need to select the voltage reference for your Analog to Digital Converter, it could be internal or external.depending on what you want to select you could by manipulating the REFS bits in the ADMUX Register. It takes parameter which Reference we want DEFAULT, Internal 1.1V, Internal 2.56V or External. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin.